IARPA is funding a five-year, three-phase program to validate the "split-manufacturing" approach for wafer processing. Phase 1 focuses on logistics and compatibility at the 130nm level. Phase 2 will targets 65nm and Phase 3 22nm. CNSA is awaiting word from IARPA regarding funding for its partnership with Applied DNA Sciences.
IARPA is looking forward to the day when the electronics industry will be able to combine digital SoCs with non-digital System-in-Packages (SiPs) to create tiny high-value systems such as sensors, actuators, and biochips.
Put more bluntly, IARPA wants a fool-proof way to make sure its ultra-high-tech, multimillion-dollar, black-program components don't get altered during fabrication outside the US. That is, it wants to prevent somebody on the inside from inserting what it calls "malicious circuitry."
One way TIC proposes to do this is to physically separate the two stages of chip fabrication. Let offshore fabs lay down the transistors, but bring the wafers back to a secure US location for the metallization process. There are variations on this theme whereby chips are partially fabricated in multiple locations but final integration or packaging is conducted in a secure US facility. DNA-tagging would be used at each stage in the transfer process to ensure that part of the chip is authentic. This is not how chips are fabricated today, and the separation of the processes creates major challenges, especially as the technology advances.