"This time utilizing the third dimension"... near bottom of paragraph. It's ok to dream isnt it!
Perkinamine is a NEXT generation technology. Today's INTC announcement was about 22nm CMOS circuitry.
The next-gen is 16nm CMOS, which is on Intel's roadmap:
"The 16 nanometer (16 nm) node is the technology node following the 22 nm node. ... ... By conservative ITRS estimates the 16 nm technology is projected to be reached by semiconductor companies in the 2014 timeframe."
"On February 18, 2011, Intel announced that it will construct a new $5 billion fab in Arizona, designed to manufacture chips using 14 nm manufacturing processes and leading-edge 300 mm wafers. The new fab will be named Fab 42, and construction will start in the middle of 2011, Intel said in a statement Friday. Intel billed the new facility as "the most advanced, high-volume manufacturing facility in the world," and said it would come on line in 2013."
Look at the paper just presented by one of the Intel authors at the OFC NFOEC conference on March 10, less that two months ago, and note this:
"Analysis predicts this architecture to reach less than 1 pJ/b at the 16 nm CMOS technology node. A photonic CMOS process enables higher bandwidth and lower energy per-bit for chip-to-chip optical I/O through integration of electro-optical polymer based modulators, silicon nitride waveguides and polycrystalline germanium (Ge) detectors into a CMOS logic process. Experimental results for the photonic CMOS ring resonator modulators and Ge detectors demonstrate performance above 20 Gb/s and analysis predicts that photonic CMOS will eventually enable energy efficiency better than 0.3 pJ/b with 16 nm CMOS."
"To motivate the need for optical interconnects, Section II discusses the design challenges of increasing electrical interconnect data rate with an analysis of circuit complexity and power efficiency versus data rate in both a current 45 nm and a predictive 16 nm CMOS technology."
Here is the link to that conference, see slide 13.
So if I'm reading all this right, it looks like Intel _needs_ an optical interconect layer when the scale down to 14-16nm. (Unless the left hand doesn't know what the right hand is doing at Intel, which could be possible, given the size of the place)
Who knows, I'm just an assistant elevator operator. X, I won't be in tomorrow, thanks.
Your analysis of Intel's roadmap is close to LWLG's 3-5 year forecast that its Perk "will extend across the entire range of [chip manufacturer's] product line" (see link).
"Intel says we'll see the new technology first in its 22nm Ivy Bridge CPUs, going into mass production in the second half of the year, and it's planning 14nm chips in 2013 and 10nm chips in 2015."
Intel in court documents states that the top secret trade secrets concerning 14nm and 10nm chips "are worth far more than the crown jewels of England themselves". Wow!!
Thanks for sharing.
This was indeed insightful. It is interesting that INTC mentions polymers in that piece because INTC was so focused on its CMOS [silicon approach(es)] up until now.
It discuss on "Package Architecture" (page 185) that "a trench is fabricated in the substrate to accommodate the multimode polymer waveguide..."
The hybrid architecture is needed to reduce optical loss. I believe that was one of the benefits of Perkinamine was photo-stability.
and...the fabrication costs of adding the photonic devices to the CMOS is low because since "only 4 photolithography steps are needed." We know that Perkinamine is supposed to be well tolerated for the typical manufacturing processes and is supposed to be a cheaper alternative to everything else tried for E/O applications.
In fact, as far as I know, this is the first time INTC has mentioned the possibility of using a polymer for anything related to Electro/Optical devices.
The key question for us is:
How can we know for sure if that polymer referenced is Perkinamine? This is well beyond my ability to understand on my own.
From an investor's perspective if this is a year 2014 project as Buzzlightyear contends, then I ask everyone what was referred to when LWLG mentioned "meaningful revenue" in 2011? It probably was not Perkinamine for processing/computing...but rather something defense related or something telecom related. Otherwise, they have been either miscalculating or misrepresenting their true commercialization time-lines.
I'd like to hear the thoughts from the intelligentsia here.
and in steps
University of Washington is already woking with Intel and has the patent. Where does nowave fit in?
Waveguides having closed loop structures (such as rings and ovals)...
"first disclosed by Intel in 2002"
9 years to bring this technology to market.
Is the picture I have painted clear yet? This company is yeeeeeeeeeeeears away from anything material and will remain a science experiment until they run out of funds and are unable to raise additional.
LWLG may still be in the game. Time will tell.
"Mr. Turpin, who participated in a panel on improving storage and processing with 3D stacks of silicon chips, informed the conference attendees that "Lightwave's material could be spun onto silicon chips prior to stacking and used for input, output, and interconnect due to the stability of Lightwave's electro-optic polymer and Lightwave's recent demonstration that its proprietary Perkinamine material can survive all of the rigors of standard commercial manufacturing processes."
-low cost interconnects
-energy efficient interconnects
-"can survive all of the rigors of standard commercial manufacturing processes."
-can be spun onto silicon chips
I wonder if LWLG could help in this endeavor? And, if so, who might be interested? Intel, IBM, Google, Microsoft?
"The development of quantum computers, especially optical quantum computers, is a futuristic activity; however, Jeremy O'Brien believes that the time horizon for OQC success can be brought closer in by using quantum-walk correlation of two (or more) single-photon sources within a waveguided optical correlator PIC built upon a chip . We share this vision of onchip optical quantum computing and to it we add a proposal of reconfigurablity in which the chip can provide different kinds of quantum computation."