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Intel Corporation Message Board

  • ltisteve@verizon.net ltisteve Mar 14, 2012 2:29 PM Flag

    One giant threat to Intel

    Here's the latest ARM fanboy hyperbole.

    http://seekingalpha.com/article/434051-one-giant-threat-to-intel?source=yahoo#comment_update_link

    Read comments for my beatch slap.

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    • agree...

      When NVidia first said they were working on Project Denver...
      Chief Scientist Bill Daly points were:

      Larger Register set
      Predication
      More Parallelism
      Predication
      Modern Compiler Optimizations
      Lower Power

      We can only wait to find out what it turns out to be...
      Maybe the result will be anti-climatic
      But if it's gonna happen anywhere, it would be here...

    • Gregory,

      I totally agree with you. Perhaps I didn't explain my thoughts properly. But I was saying exactly what you seem to say. That physics/electricy based changes (3-D is considered that) make all the difference and not architectural changes like wider or deeper pipelines.

      >thanks to tri-gate entire sections of the chip can be powered down with zero leakage

      agree 100% but this is a physical and not an architectural change.

      I hope this clears it up.

      BTW, I think INTC has not milked the 3D in their new 22nm process. I think they do the usual, holding back some of the possible improvements so they can slowly milk our pockets :):):)

      3D can do a lot more than what ivy bridge appears to do.

    • Power/scaling issues with IPad3. I'm hearing the power/CPU performance numbers are not very good - the screen itself is a major hog. This should become more evident as techies start doing their write-ups (analysts dont have a clue). IF this was done on a 32nm process (as rumoured), Apple has a huge problem on its hands as it moves to ipad4, 5, etc. as the fab issue becomes THE issue. Intel is looking pretty right here. IMO, its not IF Apple has to do some deal with Intel, it's WHEN.

      • 1 Reply to backbay_bstn
      • Power/scaling issues with IPad3. I'm hearing the power/CPU performance numbers are not very good - the screen itself is a major hog. This should become more evident as techies start doing their write-ups (analysts dont have a clue). IF this was done on a 32nm process (as rumoured), Apple has a huge problem on its hands as it moves to ipad4, 5, etc. as the fab issue becomes THE issue. Intel is looking pretty right here. IMO, its not IF Apple has to do some deal with Intel, it's WHEN.


        ____________

        Too bad the civilized world has you on ignore for your childish rants and can't see this post.

    • gregory.lynn@rocketmail.com gregory.lynn Mar 16, 2012 7:25 AM Flag

      H you know a lot about processor architectures of the past 20 years without a doubt, but I think you are wrong about Haswell not offering aything new.

      Tri-gate changes the physics involved, and allows for twists to old methods. For example, thanks to tri-gate entire sections of the chip can be powered down with zero leakage, and tri-gate enables Ivy Bridge to be capable of 100% overclock, both extreme departures from the past.

      It is apparent also by the numbers that they have some new tricks up there sleeves with regard to Haswell.

    • Now that's funny. A solid road map - just no road. ARMs fabrication is totally broken as indicated by TSMCs continuing silence on its production crisis...
      -----

      Only broken in your mind:) The A15 has tapped out on a TSMC 20nm process and one of the M cores (tiny micro controller) has tapped out on an IBM 14nm test process. Clearly the later is a baby step, but a step none the less.

      As for TSMC until we actually know the 'problem' it's difficult to comment. The whole process could be duff, or it could be something more mundane.

    • "On the ARM side we solid road maps to 20nm (A15@32/28, A15+A7@32/28, 64bit@20nm). Yes, all dependent on the fabs, but the designs are there."

      ***

      Now that's funny. A solid road map - just no road. ARMs fabrication is totally broken as indicated by TSMCs continuing silence on its production crisis...

    • I've seen the vaporware prototype in action at CES. It does exist, and it has orders. I can't remember Intel ever backing down from an announced launch product. So, no the Intel Smart Phone is a reality.
      -----

      :) Intel not backing down from an announced launch product. How long have you been an Intel long?

      The phone will ship, just a case of when...

      -----
      As for ARMH ability to design processors, that hasn't been an issue. They get paid thanks to lucrative license agreements. The larger issue is the CAPEX costs and payback periods. It's expensive to go to each generation. I am estimating that ARM won't be able make a payback on 28nm until sometime in 2015 if not later. Being able to design 20nm won't be an issue, but it's going to be very expensive to get to that size and the payback period will be even longer.
      -----

      ARMH is already earning royalty at the the 32/28nm node.

    • ltisteve@verizon.net ltisteve Mar 15, 2012 4:48 PM Flag

      >>At the moment we have vaporware from Intel (as yet, no shipping smart phone) and vague road maps for 22nm and 14nm. On the ARM side we solid road maps to 20nm (A15@32/28, A15+A7@32/28, 64bit@20nm). Yes, all dependent on the fabs, but the designs are there.

      I've seen the vaporware prototype in action at CES. It does exist, and it has orders. I can't remember Intel ever backing down from an announced launch product. So, no the Intel Smart Phone is a reality.

      As for ARMH ability to design processors, that hasn't been an issue. They get paid thanks to lucrative license agreements. The larger issue is the CAPEX costs and payback periods. It's expensive to go to each generation. I am estimating that ARM won't be able make a payback on 28nm until sometime in 2015 if not later. Being able to design 20nm won't be an issue, but it's going to be very expensive to get to that size and the payback period will be even longer.

    • the only way you can fill a modern CPU (x86) is by virtualizing the eff out of the machine. You will see much more gains in performance when software programming catches up with the hardware advancements. Hardware has progressed incredibly but software is so behind that in most cases if a CPU design has not been tried, in real life it will not make a huge difference due to inneficient software.

      Most performance tests (check Anandtech that you seem to love:) involve some sort of virtualization or some artificial thread spawning.

      The easiest way to more performance (assuming there is enough load on the machine to require it) is to just pump the buses with more data.

      If you get a faster medium for memory (at any level) then you will see a performance leap.

      Check the PC/Laptop space. What made the biggest performance difference the last couple of years? Sandy Bridge or the SSD drives ? Overall ...

      Same inside the CPU. If a better medium is found for the various caches then the performance will advance significantly. You can try all the tricks you can think of but a better medium will make a big difference even without the craftiest design.

      So where does all that lead in our discussion? Mediums, processes, physics, electricity.

      Again this is an oversimlified view but the bottom line is I don't see any particular design having the upper hand. Fixed length in the server space was all the rage in the early 90s but INTC x86 killed it (some to the amazement of INTC itself who seemed to think Itanium will prevail)

    • btw, just want to add that I'm well aware that many of the CPU speed advances thru the years did come from process shrinks and more cache memory...

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