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Intel Corporation Message Board

  • wallisweaver wallisweaver Dec 29, 2012 9:17 PM Flag

    More Problems with Planar for ARM at 20nm

    Introduction: Problems Facing Transistor Scaling

    The traditional, planar field-effect transistor (FET) has been extremely successful over the past 40 years with dependable improvements in speed, power, and density as its critical dimensions have steadily been scaled down. But starting at 90nm, a number of physics-based problems started to overwhelm the effectiveness of this traditional transistor architecture. Some of these shrinkage-related problems have found a technology fix—like an effective technique to reduce gate oxide leakage by using high-k metal gate (HKMG) technology [invented by Intel]. Nevertheless, several intractable problems remain unresolved and make it difficult to effectively shrink planar transistors much below 25nm.

    Above from white paper by Synopsys

    [In other words, 20nm planar will be no slam-dunk for ARM and therefore there is no good way of projecting when volume production might be achieved. If it is not achieved by the middle of 2013, there are dire implications for ARM, TSMC and Apple. There is virtually no chance of it happening by that date...]

    Sentiment: Strong Buy

 
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