Per Achronix web site
Achronix ships 22nm, finFET FPGAs
Startup gets jump on its rivals
By Mark LaPedus
Taking the process technology lead in the FPGA market, Achronix Semiconductor Corp. has officially begun shipping the first in a family of devices based on Intel Corp.’s 22nm finFET technology.
Achronix’ FPGAs are built on a foundry basis by Intel, as part of a major agreement announced in 2010. Intel has been offering foundry services for select customers, who are leveraging the chip giant’s 22nm finFET or tri-gate technology.
Basically, Intel is providing a turnkey solution. It is providing both front- and back-end manufacturing services for the startup. Achronix’ initial device, the Speedster22i HD1000 FPGA, is a six-billion transistor, 2,600-pin FPGA. Another company, Tabula, will also have its 22nm FPGAs made on a foundry basis by Intel.
With the help of Intel, Achronix has leapfrogged its bigger rivals in Altera and Xilinx in terms of process technology. The two FPGA giants have been separately shipping their respective 28nm devices, and are still developing their 20nm planar parts.
Still, Achronix will arguably have a substantial lead. “At the 22nm node, I think it’s almost two years,” said Robert Blake, president and chief executive of Achronix. “It might even be three.”
The gap could widen when Intel moves to 14nm by year’s end or so. “As (Intel) marches down the technology path, we will too,” Blake said.
Achronix is going after the high-end, FPGA market, which was roughly a $3 billion business last year. In total, the PLD market hit $4.6 billion last year, according to the company.
Shift to finFETs
Over time, Achronix could turn the FPGA market upside down. For decades, chip makers have been making use of 2D planar transistors. But as a device scales, planar transistors begin to experience undesirable short-channel effects, prompting the need for 3D-like finFETs.
In 2011, Intel rolled out a finFET or tri-gate structure. The chip giant has put tri-gate transistors into production for its processor designs at the 22nm node. Tri-gate transistors, according to Intel, provide up to 37% performance increase at low voltage versus Intel’s 32nm planar transistors.
In Intel’s tri-gate structure, the traditional “flat” 2D planar gate is replaced with a thin 3D silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin—two on each side and one across the top—rather than just one on top, as is the case with the 2D planar transistor, according to Intel.
While Intel is shipping its finFET transistors, the company’s rivals and the foundries are playing catch-up in the arena. Unlike Intel, the foundries will extend planar transistors at 20nm, with plans to move to finFETs at 14nm.
The foundries are not expected to bring up their 20nm and finFET processes in volumes until 2014 or 2015. Officials from Altera said the FPGA maker is scheduled to ship its first 20nm devices before the end of this year.
So, until the foundries can ramp up their 20nm planar and 14nm-class finFET processes, Altera and Xilinx are arguably behind Intel’s foundry customers--at least in terms of process technology.
In the overall FPGA market, however, Altera and Xilinx currently dominate the business in terms of share. “While Xilinx gained share in new products in 2012 overall, Altera has outgrown Xilinx at 40nm over the last three quarters,” said Hans Mosesmann, an analyst with Raymond James & Associates, in a recent research note. “Our view is that Altera has the edge at 40nm in 2013 and likely well into 2014.”
The 28nm race is still to be determined. “With 28nm, we certainly have a race,” Mosesmann said. “Xilinx clearly has the quarterly sales momentum at this point and thus we are looking at 2H ‘14 or even 2015 before we see a clear winner. We must say that for Xilinx, 28nm is not a missed cycle, and as such Xilinx has the opportunity to reverse the 40nm trends that favor Altera in our opinion.”
At the 22nm/20nm node, Achronix has the early lead. Built on Intel’s 22nm, tri-gate technology, the company’s Speedster22i devices are said to consume half the power and are half the cost of competitive parts.
Achronix is targeting its parts for high-end applications, such as high-end computing, networking, security, telecommunications, and test and measurement. To compete in those markets, the parts consist of a suite of hardened interface IP, including 10/40/100G Ethernet, 100Gbps Interlaken, PCI Express Gen1/2/3 and 2.133Gbps DDR3 controllers.
Additionally, Achronix will leverage Intel’s vertically integrated offerings, such as wafer fabrication, device packaging, testing and production device qualification. Sunit Rikhi, vice president of the Technology & Manufacturing Group and general manager of the Custom Foundry unit at Intel, said: “The delivery of the first Speedster 22i FPGAs is an important milestone in a multi-year strategic relationship with Achronix.”
The Speedster22i HD1000 is the first member of the Speedster22i family. It includes over 1 million LUTs, consisting of 700,000 programmable LUTs and 300,000 LUTs of additional functionality provided by the fixed-function hardened IP. The device also integrates 86Mbits of RAM, 960 programmable IO and 64 lanes of 12.75Gbps SerDes.
The Speedster22i HD1000 development kit includes a PCI-express form-factor, HD1000 development board, ACE software, programming pod and power supply. Engineering samples are available. The HD1000 development board is available for purchase at a price of $13,000, including ACE development software.
The next device, Speedster22i HD680P, is currently supported in ACE and will be available in Q2 2013. The HD680P has 660,000 LUTs. Meanwhile, the HD1500 is the largest member of the Speedster22i family and will include 28Gbps SerDes. With 1.725 million LUTs, the HD1500 will be available at the end 2013. In the first quarter of 2014, the company will ship the HD210, a device with 265,000 LUTs.
Besides Achronix, Intel has identified another programmable-chip startup, Tabula, as a customer of its foundry services. It also says it has OTHER CUSTOMERS who choose not to be identified yet.
Intel did not do this for money - besides other reasons Intel is building up their SoC expertise-
But the biggest upside for Achronix came when Intel offered IPs, including high-speed general purpose input/output (GPIO), serializer/deserializer (SerDes) used in high-speed communications, embedded memory blocks and PLLs. By using these hardened IPs as cell-based logic around its FPGA, Achronix was able to save area, reduce power consumption by half, and cut cost and design time similarly, Blake explained.
But the biggest upside for Achronix came when Intel offered IPs, including high-speed general purpose input/output (GPIO), serializer/deserializer (SerDes) used in high-speed communications, embedded memory blocks and PLLs. By using these hardened IPs as cell-based logic around its FPGA, Achronix was able to save area, reduce power consumption by half, and cut cost and design time similarly, Blake explained.....
For analog designers, he (Bohr) asserted, an important transistor metric is trans-conductance by power out (GM x Rout). Bohr said that while this value had been steadily degrading over the past few generations, it had shot up again in 22-nm trigate SoCs, making it easier for analog circuit designers to use than Intel’s previous three generations of planar technology.
"With the help of Intel, Achronix has leapfrogged its bigger rivals in Altera and Xilinx in terms of process technology. The two FPGA giants have been separately shipping their respective 28nm devices, and are still developing their 20nm planar parts."
[Just as Achronix has leapfrogged its bigger rivals in Altera and Xilinx, Intel will leapfrog its bigger mobility rivals in Qualcomm and Apple...]
Sentiment: Strong Buy