in regards to FF's were pretty sobering and the ARM clowns on this board don't even listen to their own people....
FinFET race holds promises, perils
If you read this article carefully and still don't believe Apple is not seriously looking at Intel TriGate you must be blind, deaf
semi junkie, aka Mr. Head in the Sand....
We get it... you've never used Synopsys, and are overwhelmed with what the tools do...
Look how blown away... and overly impressed you are with the jobs that the engineers do...
So to expose how naive you are... and inexperienced with Synopsys...
What of any of the quotes you parade do you think will halt the ARM camp...
Your ID tag is a Joke
Clown has no understanding of SEMI-EQUIP
Intel has slight light in 14nm but competition same tools/equipment available that Intel has...
2013 is bad for Intel and 2014 will be far worst
Sentiment: Strong Sell
"They still don't get it.
Synopsis plays key support to ARM and the fools don't listen"
If you're gonna act like a Synopsys expert... then at least learn how to spell it...
Tell us all... what do you think the ARM camp doesn't get...
what is unique to ARM, but NOT to other Synopsys users...
but EUV still not ready till 2014
In theory, DSA is attractive because it could reduce the overall cost of lithography. And compared to EUV, DSA requires less R&D funding.
“We don’t need billions of dollars,” said Ralph Dammel, chief technology officer for AZ Electronic Materials, a supplier of materials for DSA and other applications. “Materials development is inherently cheaper than tool development. The current funding is probably adequate to get the industry going for the 14nm node with DSA. If we’re talking about high chi polymers, which will be needed for the 10nm node and beyond, the industry should think about different funding mechanisms. But even so, we are not talking about huge sums.”
Meanwhile, over the last year, Albany Nanotech, CEA-Leti and IMEC have set up 300mm R&D pilot lines for DSA. Major chipmakers are doing their R&D work within these organizations. “Basically, DSA is still in the R&D stage,” said Charles Pieczulewski, director of strategic marketing for Sokudo, a wafer track supplier. “The industry is still working through the bugs with the materials.”
Going forward, the challenge is to bring DSA into the IC design and production phases. “The main challenge is device integration,” said Ben Rathsack, strategic marketing and technology manager at Tokyo Electron Ltd., the world’s largest wafer track supplier.
Last year, Applied’s Bencher listed defectivity as the top challenge for DSA, followed in order by registration, design flexibility and positional accuracy. For 2013, positional accuracy—or the ability to align the block copolymers in the proper place—has moved to the biggest challenge for DSA, Bencher said.
Bencher expects memory makers will be the early adopters for DSA, followed by logic and foundry vendors. The prediction is based on the ability to generate IC designs using DSA. “You hear people saying: ‘We need a whole design ecosystem to enable DSA.’ That might be true for logic, but these are the last people that would implement DSA. This is because you need the most flexible designs in logic,” Bencher said. “Memory makers don’t really need that whole design ecosystem. They need maybe 1% of the EDA ecosystem, compared to the logic people.”
Currently, there are several design approaches for DSA. One idea is using 1D gridded arrays, but the problems are obvious. “Designers don’t want to be restricted to having contacts only on a grid or vias on a grid,” Bencher said.
Another concept is laying down a sea of holes or fins on a pattern. “In the chemical epitaxy approach, you make holes everywhere to start with. Later, you will do a lithographic step, where you select which ones you want to keep and which ones you want to get rid of. But the problem is that the aerial image can be very sloppy,” he said.
Sentiment: Strong Sell
"FinFETs bring a 66 percent increase in gate capacitance per micron compared to today’s-28 nm process, back up to the level of the 130-nm planar node, said Anil Jain, vice president of IC engineering at Cavium Networks. Capacitance will limit both performance increases and dynamic power scaling for high-end chips, he said." eetimes
From 32nm to 22nm, Intel was able to both increase performance and reduce power which is what the article says you can't do. FinFETs do allow you to greatly reduce the leakage current (read ... low end, long battery life).
The shift toward the 20nm node and beyond will require new and major breakthroughs in chip manufacturing.
Most of the attention centers around lithography, gate stacks, interconnects, strain engineering and design-for-manufacturing (DFM). Lost in the conversation are two other critical but overlooked pieces in the manufacturing puzzle—wafer inspection and metrology.
For years, inspection and metrology tool vendors have managed to stay one step ahead of the defect curve. But as chipmakers migrate toward finFETs, 2.5D/3D chips and other complex structures, process control will become even more challenging and costly.
In fact, three key process control tools, CD-SEMs, brightfield defect inspection and optical scatterometry, may soon run out of steam, prompting the need for a new class of 3D metrology gear. “When we get to the 14nm node, we may be able to get by with what we have,” said John Allgair, senior member of the technical staff and Fab 8 patterning metrology manager at GlobalFoundries. “As you get to 10nm, we might need a new technology.”
Next-generation 3D metrology tools exist to some degree, but the industry must make substantial investments to bring these technologies into production. And that’s precisely where the problem, and tension, exists between chipmakers and tool vendors. To develop new tools, equipment vendors want a bigger piece of the R&D pie and want customers to assume more of the risk.
“Different business models are definitely needed,” said Chris Talbot, senior director of strategic licensing at Applied Materials. “As the industry consolidates, with 450mm and EUV on the horizon, the amount of R&D that needs to be done not just in metrology and inspection, but right across the equipment industry, is enormous.”
One idea is to replicate ASML Holding’s recent and blockbuster business deal. Intel, Samsung and TSMC recently invested millions of dollars in ASML to speed up the development of extreme ultraviolet (EUV) lithography and 450mm tools. The three chipmakers also took minor stakes in ASML.
“The investments made by Intel and others in ASML are huge to solve an enormous problem,” Talbot said. “This is maybe one of the things we need to look at for other segments of the industry.”
Wanted: New business models
Sentiment: Strong Sell