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Intel Corporation Message Board

  • sujit_98 sujit_98 May 10, 2013 1:27 PM Flag

    FinFET performance advantage at 22nm: An AC perspective (17 % advantage)

    At the 22 nm node, we estimate that superior electrostatics and reduced junction capacitance in FinFETs may provide a 13~23% reduction in delay relative to planar FETs. However, this benefit is offset by enhanced gate-to-source/drain capacitance (Cgs) in FinFETs. Here, we measure FinFET Cgs capacitance at 22 nm-like dimensions and determine that, with optimization, the FinFET capacitance penalty can be limited to

 
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