How many time did I refer to ASML?
No more cheap ARM SoCs...and there is a difference between an IDM process and a foundry process - not just with respect to Nanometers - the foundries are far more dependent on EUV compared to Intel.
the strength of IDM is That manufacturing team and design design work very closely together from the very beginning. TSMC would work with several different customers together - and it's difficult to find a common denominator - foundry customer A,B and C all need to compromise on one process more or less.
"Our foundry processes in the following sense that foundries are having another challenge that the IDMs would not have. The challenge is that they have to deliver design rules, which are less restrictive and they have to deliver shrink factor, which is very aggressive. So, yes, my comments on 14-nanometer being a competitor to being in the first to go concerns more the foundry environment than it concerns the microprocessor environment."
ASML agree with our view that without EUV lithography, the transistor cost curve originally associated with Moore’s Law has decelerated if not disappeared, and that the successful implementation of EUV is necessary to return the industry to that 20-30% transistor cost curve […] The implementation of multiple patterning lithography to shrink chips has led to higher transistor costs as outlined in our “Moore Stress” thesis […] We remain challenged reconciling commentary from different industry leaders around high volume manufacturing (HVM) using EUV. ASML suggests it happens in 2016, however Intel and IBM suggest 7nm (2018-2019). On its recent earnings call, Taiwan Semiconductor Manufacturing (TSM) CEO Morris Chang suggested an optimistic scenario would be partial use of EUV Lithography at 10nm (we estimate 2017). We think EUV finds its first use in critical layers of DRAM manufacturing.