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Cymer Inc. Message Board

  • jamulmike jamulmike Aug 23, 2012 11:00 AM Flag

    “Xilinx 3D-IC”

    Like the HDD and CRT, the current form of MOBO is doomed.
    The Mobile Model has won! Bigtime!!!
    Think innovators!!!
    Insist on Cymer!!!!!!!!

    Xilinx 3D-IC System Integration at Hot Chips 2012
    Press Release: Xilinx, Inc. – 3 hours ago

    SAN JOSE, Calif., Aug. 23, 2012 /PRNewswire/ -- Xilinx, Inc. (XLNX) today announced its participation at Hot Chips 2012, August 27-29, at the Flint Center for the Performing Arts. Xilinx corporate vice president of FPGA development and silicon technology, Liam Madden, will kick off Xilinx activities by hosting a multi-vendor tutorial on die stacking, with presentations from AMD, Amkor, Qualcomm, UMC, and Xilinx. During the tutorial, Xilinx will cover how 3D-ICs built with Xilinx stacked silicon interconnect technology are delivering capabilities that in many respects are a process generation ahead of what could otherwise be made available.


    What: Hot Chips 2012

    Where: Cupertino, CA, the Flint Center for the Performing Arts

    When: Conference – August 27-29, 2012


    Monday, August 27
    2:00 p.m. – 5:30 p.m.
    Die Stacking
    3D die stacking increases aggregate inter-chip bandwidth and shrinks board footprint while reducing I/O latency and energy consumption. By integrating in one package multiple tightly-coupled semiconductor dice, this technology gives system designers additional options to partition and scale solutions efficiently. During this tutorial, participants will present key die stacking technologies; design considerations and trade-offs of 3D in CAD, ESD, and architecture; and how these technologies are used in systems and applications for memory integration, optics integration and monolithic die partitioning. Xilinx director of IC design, Shankar Lakka, and Xilinx senior director of advanced communications, Ephrem Wu, will cover topics such as Xilinx stacked silicon interconnect technology, optical integration, and engineering challenges in developing 3D-IC products.

    Tuesday, August 28
    5:50 p.m. – 6:50 p.m.
    FPGAs with 28 Gb/s Transceivers Built with Heterogeneous Stacked Silicon Interconnects
    During this session, Wu will discuss the design of the Virtex®-7 HT devices, the industry's first heterogeneous FPGAs that combine separate FPGA and 28G transceiver ICs in one package. Wu will present key applications as well as an overview on stacked silicon packaging and interconnects.

    About Hot Chips
    Since it started in 1989, Hot Chips has been known as one of the semiconductor industry's leading conferences on high-performance microprocessors and related integrated circuits. Hot Chips provides an opportunity for chip designers, computer architects, system engineers, press and analysts, as well as attendees from national laboratories and academia to mix, mingle and see presentations on the latest technologies and products. The conference is held once a year in August in Silicon Valley, the center of the world's capital of electronics activity.

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    • The Analog crowd, TI et al, will soon wake to find their bloated discrete circuits in somebody else's 20nm and below chip.

      Think Mother of All Paradigm Shifts!!!
      Insist on Cymer!!!!!!!

      History will repeat!
      The cave dwelling flat earthers mistake Paradigm Shift as Armageddon.
      So it has been.
      So it will be...
      Until gene pool gets cleaned up.