South Korean publication Business Korea is claiming NVIDIA will source HBM2 memory for its next-gen Pascal GPU architecture from both Samsung and SK Hynix.
According to the report, Samsung and SK Hynix will both start mass producing second-gen High Bandwidth Memory (HBM2) for NVIDIA’s Pascal GPU by Q1 2016. A pilot production run and reliability tests are expected to be completed by the end of this year.
NVIDIA’s chief rival AMD already has products in the market using first-gen HBM, supplied by SK Hynix. The second-gen HBM will offer even better performance though, as it is claimed to process data twice as fast as the first-gen HBM modules. Storage capacity of the 8Gb HBM is also claimed to have increased fourfold.
Apart from use in NVIDIA’s Pascal GPU, HBM2 modules from Samsung and SK Hynix are also expected to be used in servers, supercomputers, networks, and high-performance PCs starting early next year. In the near future, they will also be used in other digital consumer products such as video game consoles.
"But you act like you have the inside scoop"
It's your thread that posted questions the whole world already knows the answers to...
semi_punk, now you answer your own posts with newly created aliases... the SHAME !!!!!
You cut & paste content above your head... then proven time & time again you don't understand a word
LMAO !!!! PUNK !!!!
chipinvstr, thanks for your first post. Welcome to the board.
Yes, I see you have a clear view. Please explain that to semi_punk... please !!
If you do, he'll cut & paste months old news and act like you've never heard of it.
"so the SOC's that you have worked on are device dominated?"
"And the size of the wires at 16nm should be smaller than the wires at 28nm. "
Yes, the rest of the world realizes it's 20nm... but since you're so in touch, you can stay with 28nm...
"I just explained why you don't get a power benefit if you don't shrink wires."
You didn't explain squat !!! Most TSMC customers are opting to bypass 20nm transistors
and use 16nm. But you can let them all know there's no power benefit.... before you're fired.
"I do not post silly blurbs copied and pasted"
Funny... evidence is cut & paste is all you can do for it's above your head...
"I know exactly what to search for off the beaten trail"
Funny... for common knowledge is all you can cut & paste...
And evidence always is you don't understand any of it !!!!
semi_punk, more cut & paste of things above your head !!!!
Do you hope & pray it makes you look smart ??
What's the size of the wires ?
How do you calculate R ?
How do you calculate C ?
"G61 - now you know why TSMC et al stayed with 20nm ....."
semi_punk, why o why do you act like you understand anything ??
What is the size of the wires ? You have NO CLUE !!!
How do you calculate R ? You have NO CLUE !!!!
How do you calculate C ? You have NO CLUE !!!!
What's the transistor length ? You have NO CLUE !!!!
what's the transistor width ? You have NO CLUE !!!!
"SOC's are typically wire limited."
Blatant Nonsense !!!!
"f TSMC is really not shrinking the wires, then it is ridiculous to call in 16nm."
Oh... What should the size of the wires be ??
Do you have any clue ??
"What the hell benefit does a customer get if you don't shrink the wires?"
Power... Time to market...
"So cell utilization will be low, but routing will be a nightmare. "
Semi_Punk, you don't know squat about 20nm interconnect sizes !!!!
You don't even know what the 20nm refers to !!!!
"there are the dummies like G61 who really has zerounderstanding of the manufacturing and business aspect"
My fabless stock NVDA has outperformed all your equipment stocks...
You just don't know how the semiconductor business works...
Yet you parade yourself as an expert...
Semi_Punk, why do you hide behind a new id ?? COWARD !!!!
"TMSC has not shown their interconnects for 16 or 10 or 7"
"they are still the same size since 28nm"
If they haven't shown them, but yet you claim they are the same for 28nm.
You have NO CLUE... NONE to interconnect size !!!!
TSMC will start early production on a 10nm process this year and 7nm in 2017, executives said in a road map update here. In between, the foundry giant will release a cost-reduced version of its 16nm process next year and a broad portfolio of specialty processes for the Internet of Things, automotive and sensors.
The road map suggests TSMC could leapfrog Intel to producing 10nm chips
"perhaps Intel even rejected Apple's foundry business - who really knows"
Obviously NOT you...
"don't read or comment on my posts"
" Intel even rejected Apple's foundry business"
You have NO CLUE... NONE !!! to any Apple / INtel deals...
But yet you present nothing more than a guess as if you know what's going on...
"why #$%$ away capacity that could be used for cross point?"
For the same die area, do you think INtel gets more for cross point ? Or skylake ?
Do you think INtel would get more for cross point ? Or Apple's SOCs ?
Do you have any clue at all about this ?
TSMC will make all of the microprocessors for the iPhone 7 that is due to debut in 2016 using its 16nm
TSMC will make all of the microprocessors for the iPhone 7 that is due to debut in 2016 using its 16nm FinFET manufacturing process
Taiwan's Commercial Times referenced unnamed people in Apple's supply chain as sources for the story.
This would represent a rejection for Samsung and Globalfoundries – its partner in 14nm FinFET manufacturing. Samsung is thought to have a 50 percent share of production of the current processor, the A9 which is shipping in the recently launched iPhone 6 and iPhone 6 Plus. It would also be a bounce back into Apple's favor for TSMC.
Mass production of the A10 processor is expected to start in March 2016 so that parts can be ready for the iPhone 7 to launch in about September 2016. In addition Apple's A10 will use TSMC's integrated fan-out (InFO) wafer-level packaging technology
"I own ASML. KLAC and LRCX - for some time"
NVDA has outperformed all of them !!!! - for some time
NVDA pays a dividend too :)
All on inferior fabs to INtel... Oh My...
" Sounds like they are dedicating too much silicon to graphics functionality"
1/2 to 2/3 the die area of their new chips...