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Intel Corporation Message Board

marsavian 317 posts  |  Last Activity: 5 hours ago Member since: Jun 15, 2005
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  • Reply to

    Core M v.s. A8X in Geekbench 3

    by theblueredmonk 9 hours ago
    marsavian marsavian 5 hours ago Flag

    You forgot to mention that was a pre-production pre-release model which for some bizarre reason has an ultra-strict 3.5W TDP attached to it. I'm sure it was an oversight :).

  • Reply to

    Core M v.s. A8X in Geekbench 3

    by theblueredmonk 9 hours ago
    marsavian marsavian 7 hours ago Flag

    Nvidia showed that GB3 overestimates ARM performance by 30-40% compared to the more reputable SpecCPU but still it is better than nothing. Apple's Alpha clone keeps ahead of the rest of the ARMy but it is not ready to challenge Core in higher power sockets.

  • Reply to

    Poor, Poor Wallisweaver

    by galba_tamponerator Oct 21, 2014 10:27 AM
    marsavian marsavian 7 hours ago Flag

    Agree on all three points, especially as I was harangued over having the temerity to say INTC's charts looked good around 26 :) but Trolls are best ignored in my opinion.

  • Reply to

    Core M v.s. A8X in Geekbench 3

    by theblueredmonk 9 hours ago
    marsavian marsavian 7 hours ago Flag

    Apple's latest 1.5 GHz loses every single-thread integer subtest (not including special instructions SHA-1/2) and most of the floating-point ones to a 2 GHz Core-M (top model is 2.6 GHz). A8X is not suitable to go up their product stack. Interestingly it is 3 cores too.

  • marsavian marsavian 14 hours ago Flag

    and Intel's competition in tablets and phones has only just started. The competitive picture for ARM will not look any rosier once Intel's 10-14nm mobile products are out there in volume. ARM has had a good bubble run fooling a lot of people that it is the next Intel but it is not and $15-20 awaits it in years to come.

  • marsavian marsavian 14 hours ago Flag

    'The drop in value per new license sold implies that most of ARM's larger deals have been completed, firm says.'

    I said last quarter that this is an unsustainable source of high revenue, it will have to come down to royalties in the end and their growth spurt is ending too. Any sane analysis over the last few years can not really justify a price much higher than $15 and now the market is beginning to move to that.

  • marsavian marsavian 14 hours ago Flag

    Buffett always said he never understood technology companies and his preference of IBM over INTC just proved it as Intel has the more unique differentiated products.

  • Reply to

    Poor, Poor Wallisweaver

    by galba_tamponerator Oct 21, 2014 10:27 AM
    marsavian marsavian 14 hours ago Flag

    Wallis has provided a lot of good DD on Intel and its competition over the years and more often than not he has been on the right side of the technology wind. His mistake is getting into pointless thread-cluttering personality arguments with you and others, You should just ignore each other and both your lives will be better for it.

  • Reply to

    Can't hold a gain!

    by amilby36 Oct 20, 2014 1:37 PM
    marsavian marsavian Oct 20, 2014 3:23 PM Flag

    It's just temporary Short manipulation which is easy to do when volume is low and your panicking shows you are falling right into their hands. Stay relaxed, don't panic and the price will recover and then some. Every time it jolts upwards, more resistance is being worn away and when buying volume finally returns large percentage jumps will be easier.

  • marsavian marsavian Oct 19, 2014 8:54 PM Flag

    I don't think you understand how the x86 cross-license works, the money only goes one way, from all the other licensees to Intel and Intel gets to use other licensee x86 patents for free. This is why there has never been any x86 licensing revenue for AMD ever and never will be. Some say that is not fair but seriously, x86 is Intel's proprietary ISA and should it be tied to a second-source IBM PC agreement that is now 30 years old for perpetuity ? The anti-monopoly agencies seem to think so, I am not so sure as that is a bit of stretch now with ARM around to provide competition. Sorry but you will have to find another angle to pump this stock.

  • marsavian marsavian Oct 19, 2014 5:56 PM Flag

    One more thing, shrink the damn game chips onto 20nm asap because at the moment the dies are so huge TSMC make twice as much profit off them as AMD do. With a 20nm shrink that ratio would be reversed. I expect the new CEO, who was an EE involved in IBM's processes, will appreciate and action all this.

  • marsavian marsavian Oct 18, 2014 3:47 PM Flag

    If I still had the CEO's ear this is what I would advise. At 16FF I would do a single 12-core Excavator chip that can fit all the way up to the FX-9590 220W power range in AM3+ motherboards. From this single 12-core chip (which would be a smaller die than the 32nm 8-core FX-9590) do 6/8/10-core slugged versions (improves yields too) which would also be higher clocked as they lose two cores so for example 7 GHz 6-core, 6.7 GHz 8-core, 6.3 GHz 10-core, 6 GHz 12-core. Yes I really believe they would clock that high considering the FX-9590 does 8 GHz with extreme cooling and 16FF is a big improvement on 28nm. These would be instant i5/i7 competitors at very little outlay considering only one chip is designed of an existing future AMD core and the motherboards that can take that power already exist. Take the Bulldozer family to its natural conclusion and get full ROI on the damned design !!!

  • marsavian marsavian Oct 18, 2014 2:53 PM Flag

    No, instead Excavator/Steamroller will still be on 28nm and only 4-core !!! Read not only deserved to get the sack, they should claw back the money they paid him with all these incompetent lowest common denominator roadmaps ! This stupid insistence now on having just one platform going forward means all the chips turn out mediocre by having to fit just one 65W power socket. It just makes me mad to see how they have ruined a perfect competent cpu company from the K7-K10 era.

  • marsavian marsavian Oct 18, 2014 2:37 PM Flag

    The smart thing to do now would be to do two final shrinks of Piledriver on TSMC 20nm and 16FF as that would finally unlock the clockspeed potential the design has but on air-cooling, I reckon a 16FF Piledriver would be knocking on 6 GHz and would a very competitive design as it would show the design's true potential. Unfortunately AMD are not too hot on being smart these days.

  • marsavian marsavian Oct 18, 2014 2:07 PM Flag

    While I am on the subject of IBM screwing AMD, they have manged to get a 22nm PD-SOI shrink that AMD could have used but it is so damned expensive and exotic with so many metal layers and which they are primarily using to make Power-8. IBM have built their processes for performance and not cheap manufacturability like Intel and PD-SOI was an expensive dead-end in the end.

  • marsavian marsavian Oct 18, 2014 1:50 PM Flag

    GF employed exactly the same people that AMD did before AMD handed it over. This is nothing to do either with half or full nodes. It's due to the fact that the IBM/AMD/G-F 32nm PD-SOI gate-first HKMG was a complete #$%$-up of a process in terms of yields. Yields were initially as bad as one or two chips per wafer ! I blame IBM for this as they should have used gate-last for HKMG like Intel and TSMC correctly did. Gate-first is smaller and higher performing but that's no good if you can't get any yields. It cost $$$$$$$$$ of investment by Abu Dhabi to get this working in the end which AMD did not have so getting rid of the FABs when they had a decent working 45nm process was the smart thing to do by Hector as they would have been unsellable with that initial 32nm process !

  • marsavian marsavian Oct 18, 2014 1:20 PM Flag

    Hector was a great CEO, he was just let down by the idiotic cpu designs dreamed up by Dirk Meyer and his teams. Hector saved this company by buying ATI and selling off FABs which were becoming uncompetitive and had badly yielding new 32nm processes.

    The only idiot and moron here is YOU flapping your gums and waving your arms about about technology you know squat about.

  • marsavian marsavian Oct 18, 2014 1:15 PM Flag

    'yes it allows AMD to increase frequency such as their 4.0 Ghz chips but it has had the opposite effect when it comes to TDP it has increased TDP instead of lowering as promised.'

    The TDP was increased because the Bulk TSMC process was inferior in that regard to the PD-SOI G-F process. What AMD should have done is gone all in and used a FD-SOI 28nm process as they are very power efficient in that regard and almost as good as FinFET/Trigate and Samsung are now offering this process commercially after obtaining the design from ST-Micro

  • marsavian marsavian Oct 18, 2014 1:07 PM Flag

    I don't know if you remember the Moore slide from about 8 years ago where he pointed out how bad hyperthreading was compared to cluster-based threading because it killed single-thread performance. Well Intel fixed that in Core 2 and Bulldozer OTOH absolutely killed single-thread performance by basically have a quad-issue decoder feed two dual-issue pipes. When I saw the Bulldozer die floor plan when it came out I just knew the company was dead and told this thread as well as the Ihub one. It's like going back to the future and substituting two K6 cores for one K7, it just was not going to work.

    Bulldozer should have just been a single quad-issue core all the way thru even if they had not worked out hyper-threading by then because it still would have been a single-thread improvement over K10 Stars and they still could have thrown in a extra core to make up for it, like a triple-core vs i3 and a six-core vs i5 and an octo-core vs i7. This would have been an unsophisticated approach but it would have damned work and preserved ASPs. I also wonder now about that ex-Intel architect Glew who helped propagate this cluster-based design at AMD, was he really a plant because he went back to Intel after and is now at MIPS ?

    Barcelona had a unified L3 cache or did you mean an inclusive vs exclusive cache ? I prefer exclusive myself like AMD did because it means you don't duplicate L2 cache in L3 so your actual cache is larger.

  • marsavian marsavian Oct 18, 2014 12:51 PM Flag

    LOL, never mind the fact I used to personally advise Hector Ruiz on which sku models to bring out ! I think the only amateur is you blabbing your mouth off about technology you know squat about. Shrinking is eminently possible idiot and is what AMD did with the basic K7 Athlon design all the way to the K10 Stars core which was basically the same triple-issue design enhanced over many process shrinks. AMD only went badly wrong when they stopped a successful formula and tried something radically different with cluster-based threading in Bulldozer and it's virtually killed the company. BTW the same type of design killed Sun too as Niagara is another cluster-based design.

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