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Intel Corporation Message Board

semi_equip_junkie 422 posts  |  Last Activity: Feb 4, 2016 9:47 AM Member since: Feb 16, 2012
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  • semi_equip_junkie semi_equip_junkie Feb 4, 2016 9:47 AM Flag

    do you understand now

    I never stated that Intel is fabbing for Altera @ 22nm -
    what I said was that Intel is fabbing for several small FPGA customers at 22 nm FinFet - these are ultrahigh margin products with small quantities - it includes Tabula, Anchronix, Microsemi (bought Actel)
    IOW Intel is very capable to put FPGA's into silicon - they do have the expertise and IP -
    do you understand? Intel has several FPGA customers and your comments about lacking IP are rubbish -
    repeat rubbish
    wasn't that A.E. point - no I did not even read it but that's probably what he implied beside his idiotic comments about loosing process lead
    TSMC does not break down its revenue into 20 nm and FinFet - so nobody really knows
    Anchronix signed up with Intel in 2000 - so it takes time and Intel has a very different understanding than TSMC about the term "ramp"
    got it?

  • semi_equip_junkie by semi_equip_junkie Feb 3, 2016 9:03 PM Flag

    the born again morons....all over the news ...
    in the mean time who would have thinked?
    this country is going backwards in an alarming pace ...
    so the Cuban Boys are not slamming the pope?
    Trump pretends (he's not that stupid) but the Cuban boys would push the #$%$ leading to WW3

    and Trump has a bible....he's just messing with the "evangelicals"

    Jan 25, 2016 � World Pope Francis Meets Iranian President at Vatican Leaders discuss religious freedom and Tehran's role in the Middle East following lifting of sanctions

  • semi_equip_junkie semi_equip_junkie Feb 3, 2016 8:21 PM Flag

    Better than that slime dog cruise and that born again (evangelical) idiot Marco the Great...
    trump is just messing with you people - he just wants to see how stupid American can get

  • Reply to

    CEO Brian K. is Craig Barrett 2.0

    by back_bay_professor Feb 3, 2016 5:33 PM
    semi_equip_junkie semi_equip_junkie Feb 3, 2016 7:19 PM Flag

    His "expertise" is supposedly manufacturing, yet Intel is perceived as being late to the party on process technology.

    Perceived by "who" ?
    By you and A.E. and other "idiots" ...
    so why are you still here - nothing else to do?
    "Intel Orders 15 EUV ... NV has received an order for 15 extreme ultraviolet ... in addition to two already on order."
    He certainly is focused on manufacturing -
    you just can't educate stupid people -
    do you understand why EUV is important??

  • Reply to

    Intel can't manufacture FPGA?

    by semi_equip_junkie Feb 3, 2016 2:28 PM
    semi_equip_junkie semi_equip_junkie Feb 3, 2016 2:57 PM Flag

    This was long before the E.E. clown showed up
    To answer these questions, it is essential to first understand exactly what was announced. Intel’s partner, Achronix is an FPGA start up (under $10M in revenue last year). Achronix uses novel asynchronous logic techniques and specializes in producing high speed FPGAs. Their current products are fabbed on TSMC’s 65nm process and reach 1.5GHz, roughly 3X faster than FPGA leaders Altera and Xilinx. Achronix’s second generation Speedster 22i FPGA will be fabbed on Intel’s 22nm process technology, with engineering samples expected by 4Q11 – simultaneous to Intel’s initial ramp of 22nm. The capacity and revenue for Intel will be miniscule (

  • semi_equip_junkie by semi_equip_junkie Feb 3, 2016 2:28 PM Flag

    according to the "skunk" and A.E. braindead?
    Achronix Semiconductor is a fabless semiconductor company based in San Jose, California with R&D in Bangalore, Karnataka. It designs high-speed asynchronous field-programmable gate arrays (FPGA) chips, manufactured at Intel Fabs since 2012. The series of 22 nm FPGAs is called Speedster 22i and is manufactured using Tri-Gate process.[1] Company was founded in 2004 by group from Cornell University: Dr. Rajit Manohar, Dr. Clinton Kelly IV, Dr. Virantha Ekanayake and John Lofton Holt.[2] It was included in EE Times 60 Emerging Startups list in 2005.[3] Prototypes of its FPGAs was made using 180 nm (TSMC, September 2005) and 90 nm (STMicroelectronix, April 2006).[2][4]
    According to Kevin Morris, Achronix and Tabula may become #3 and #4 producers of high-end FPGA chips (First two are Xilinx and Altera).[10]

  • semi_equip_junkie semi_equip_junkie Feb 3, 2016 1:50 PM Flag

    since you need multiples of the linewidth to isolate a transistor. that is, It used to be linear performance gains but is not rapidly shrinking.

    That's exactly why one needs EUV ....and Intel recognized it....
    people are getting "suckered in" into line width PR.....
    EUV : One year from shipment to production and at least one generation in full production to get it fully debugged for volume production
    I am still hoping for second "generation" of 10 nm and than 5nm...
    supposedly TSMC will not use EUV @ 7 nm - so they going to jump in @ 5nm "cold turky"?
    Tsmc as always hoping for Intel to doing the grunt work -
    I think implementing EUV into production is far more challenging than FinFet and if it can be done there will be a BIG cost benefit

  • semi_equip_junkie semi_equip_junkie Feb 3, 2016 12:32 PM Flag

    Three years ago (!!!) Achronix started sampling high performance FPGA's based on Intel's
    22 nm FinFet.
    How many is XLNX selling and how do they compare
    Re EUV and Intel : I said this a long time ago - long before seeking alfa came out -
    Intel secured most of the EUV steppers in the pipeline - and ASML said in 2017 they are shipping tools that go into production (which will take about a year) -

  • semi_equip_junkie semi_equip_junkie Jan 27, 2016 12:01 PM Flag

    don't you read the transcripts - 5 minutes (just look for the important stuff)
    several quarters ago Stacy pointed out that Intel was pulling 22nm stuff over to 14nm.
    A.E.'s skills are to raise issues were no issues are -
    Man !!!! intel is running FinFets for 4 to 5 years in full production
    did A.E. ever mentioned what TSMC sales was derived from "16nm FinFet"?

  • semi_equip_junkie by semi_equip_junkie Jan 26, 2016 1:32 PM Flag

    comes from a complete moron - he talks about 10, 7 and 5 nm without having a clue what it implies - that's why Intel has a stake in ASML
    Intel might even have non disclosure agreement with ASML limiting the access of certain EUV technology to
    other customers like TSMC _ TSMC sold its stake....

    Intel Corp., the world’s largest semiconductor maker, agreed to invest as much as $4.1 billion in Dutch chip-equipment maker ASML Holding NV in an effort to shave two years from the time to adopt new production techniques.

    Jan 14, 2015 · Taiwan Semiconductor Manufacturing Co. is selling its stake in Dutch chip-equipment maker ASML Holding NV for 1.3 billion euros ($1.5 billion) as a 2 1/2 ...

    Basically what's slowing down Moore's Law is two things right now, UV is light, it should have probably coming optimally some people will argue a 22 nanometers, I actual argue probably at 32 nanometers out in that time frame, that’s really when we started to need UV when we were multi-patterning and what that does is extends the length of the process, the number of mask layers is more than doubled over the last five years, so it takes longer to do developments, it takes longer to do defect reduction.

    So that’s what happened here. I believe over the next five years the lithography tools will start to catch up, we will see whether it stays at two and half year or we can get it back two, we’re going to keep pushing back to two if we can. We still believe we have a lead, it doesn't matter whether its two years or two and a half years, that’s what drove that leadership, was our ability to develop these technologies, the creative ways we do the material science, the lithography tricks that we do for multi-patterning, that’s all going to go. In fact it's going to become more imp

  • very troubling - this will be the topic of A.E.'s next piece
    I guarantee it!!!!!

  • semi_equip_junkie semi_equip_junkie Jan 22, 2016 4:33 PM Flag

    The report confirms Intel will not be sticking to its traditional “tick-tock model”,

    I don't know what it takes to make people less afxiated / strictly focused on line width - I mean Bohr tried to explain it....for example stacking memory chips via TSV is a huge improvement although the line width does not change. Maybe somewhat Intel's "mistake" promoting the ticktock and many people have a hard time to adjust
    If they can implement EUV it will be the Mother of all Tick Tocks although the line width won't shrink

  • semi_equip_junkie semi_equip_junkie Jan 22, 2016 4:33 PM Flag

    The report confirms Intel will not be sticking to its traditional “tick-tock model”,

    I don't know what it takes to make people less afxiated / strictly focused on line width - I mean Bohr tried to explain it....for example stacking memory chips via TSV is a huge improvement although the line width does not change. Maybe somewhat Intel's "mistake" promoting the ticktock and many people have a hard time to adjust
    If they can implement EUV it will be the Mother of all Tick Tocks although the line width won't shrink

  • Reply to

    Need new leadership, plain and simple

    by back_bay_professor Jan 22, 2016 4:02 PM
    semi_equip_junkie semi_equip_junkie Jan 22, 2016 4:17 PM Flag

    Eh
    integrating FPGA into a server chip on the same die - now that's what I call a system on a chip -

  • semi_equip_junkie semi_equip_junkie Jan 22, 2016 3:24 PM Flag

    ASML said they would ship EUV in 2017 that would go into production in 2018 -
    looks like I could be correct that Intel somehow manages to get EUV into production @ 10nm.
    There was not one question about 10nm ramp during the Intel call as far as I recall - but it was HOT topic during ASML call.

  • Reply to

    Wallis

    by c4h10butane Jan 22, 2016 10:23 AM
    semi_equip_junkie semi_equip_junkie Jan 22, 2016 3:16 PM Flag

    Probably longer than people will remember the stuff that's been posted on this boatd, however
    That's exactly your problem - you don't know where to look for - so you read A.E. stuff....who is ASML referring to?
    And I told you people a dozen times that according to KLAC Intel indeed pulled in 10 nm - but you seem to be brain dead...


    “As we indicated three months ago, we expect our logic customers to take shipments of our leading-edge immersion tools in the second quarter in preparation of their 10-nanometer node ramp. As a result, we expect second-quarter sales to increase significantly from the first-quarter level,” ASML President and Chief Executive Officer Peter Wennink said in a statement.

  • Reply to

    Keep your long positions

    by lost_my_shorts Jan 15, 2016 1:03 PM
    semi_equip_junkie semi_equip_junkie Jan 22, 2016 2:45 PM Flag

    Memory was very strong - but it's not falling off a cliff.
    KLAC should be doing well - can't wait for the final closure of LRCX/KLAC deal
    LRCX has good exposure to logic as well (NVLS)

    “As we indicated three months ago, we expect our logic customers to take shipments of our leading-edge immersion tools in the second quarter in preparation of their 10-nanometer node ramp.

    As a result, we expect second-quarter sales to increase significantly from the first-quarter level,” ASML President and Chief Executive Officer Peter Wennink said in a statement.

  • Reply to

    Wallis

    by c4h10butane Jan 22, 2016 10:23 AM
    semi_equip_junkie semi_equip_junkie Jan 22, 2016 2:31 PM Flag

    and you red all 30 000 posts - this board is stupid.

  • Reply to

    Wallis

    by c4h10butane Jan 22, 2016 10:23 AM
    semi_equip_junkie semi_equip_junkie Jan 22, 2016 1:44 PM Flag

    A.E. is an annoying little ankle biter - I think down the road he'll regret wasting his time writing stuff that nobody remembers the next day.
    he lacks an EE - good designers are in great demand ....so he continues to write living from hand to mouth......he could get options and other good stuff working a real job....

  • semi_equip_junkie semi_equip_junkie Jan 22, 2016 12:48 PM Flag

    That is likely the cause of poor stock performance today.
    It's actually very similar to AMAT and LRCX - now explain this to me.
    Stocks go up and down and only occasionally there is a strong reason as to why.
    (ASML said they would start shipping EUV systems in 2017 that would go in production in 2018 - that was a nice surprise and puts ASML on track to triple earning by 2020)
    I don't see aproblem with Intel increasing the depreciation time in particular when looking at EUV - 4 years are far too aggressive and not really representative - Bernschwein of course gave it a negative spin - so what?
    Besides there are two types of depreciation : the official one according to tax code and the non official - most likely Intel is writing stuff off faster than it is reflected in the books - but you need some MBA knowledge to understand this

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