Semi_Punk ... get your head out of the sand
"i nto a 486 server chip"
so Xeon is based on ARM architecture ?!?! I did not know
"so what happened @ TSMC 16 nm ? "
Anyone have a clue what he's asking ?? ask the NVDA CEO
very , very simple : TSMC could not do it (in time) ...that's why they progress in half node
Altera for a start...
yes bone head
eventually Intel will integrate FPGA on/ i nto a 486 server chip.....a huge cost advantage G61 - clean kill for ARM server ambitions - and yes crosspoint fab is going to ramp
so what happened @ TSMC 16 nm ? No idea G 61?
How did INtel 22nm interconnects compare to TSMC 20nm ??
It does NOT matter to NVDA - up to 20nm it was a one node shrink - 65nm, 40nm, 28nm - all full shrink but what happened at 16nm FinFet?
can you answer that?
again do NOT compare it to Intel because it's non relevant to NVDA - can you follow?
they could not do it and NVDA CEO recognized it but he has NO choice.
You keep repeating yourself - early sign of Alzheimer?
and let us know when intel is going to open the fab doors to ARM
Donald and Benito have very similar demeanor -
and Donald has his storm troopers - as I said No code for Donald to access nuclear warfare - all I can say "American Idiots" at their best.....
Donald is going to make I phones in the US ....really?
Trump won't gain access to the code to launch a nuclear strike - far too scary for many conservatives.
What you're seeing is the end of a two party system - the GOP will split into a "resonable" somewhat progressive party and into the nutcase party..
I could envision a democratic president occasionally supported by somewhat progressive conservatives.
The two party approach is broken. - kaput!
Nutcase Trump might be closer to Dems on healthcare / planned parenthood compared to "reasonable" somewhat progressive GOP
what's wrong with googling and copy and paste?
I don't expect you to know what to look/search for -
go and argue with ASML ..."half node"
actually you won't be able to google "half node" because the term "half node" was used by ASML in a presentation at an investment bank - biut that's way, way beyond you and A.E.
when is Intel starting to fab for NVDA....?
wasn't Kim Yang Yu of NVDA begging Intel
and remember the money is made in equipment - they have NO choice....
If you don't like the news make some of your own!
To be blunt, neither do you. What does "half node steps" mean, and why do the foundries "do it"?
Why do they do it ?
They were probably pressured to keep up with Intel but were not capable to obtain the cost reduction to full amount - hence it's a "half node step" - the term was used by ASML NOT by me
if (shrinking the backend) would be a cake walk the foundries would have done it to obtain the cost reduction
ASML is saying that TSMC and Samsung 14/16nm was really a dog because it's still more or less a die based on 20nm
TSMC migrates to 10 nm while keeping the backend @ 16nm (from the previous node) - that's why the term "half node" - so TSMC's second FinFet generation will offer reduction in die size
(all this is really old stuff and nothing new but people just A.E., G61 (and you just don't get it - why ?
because none of you really understands the manufacturing aspect and you got brainwashed by TSMC PR - that's why I turn to ASML for my research)
Intel is the only one that maintains a full node shrink
From a lithography point of view, the 16/14 node is very similar from a little half-pitch dimension point of view, very similar to the 20-nanometer node. So you really should not compare 16 and 14 from a little pitch point of view to 10, but really 20 to 10, and that's a big shrink. And as you know, shrink has a big impact on the cost per bit. So it is driven by cost per bit. And for some customers, actually it's also value, just putting more functionality on the same square surface. That's what driving it.
To be blunt, neither do you
Read the transcripts of key supplier before opening your mouth and you get better idea what's real
TSMC’s 10nm FinFET Process Is On-Track – Ready To Begin Ramp to Trial Production at Fab 15 in 2H 2016
.....TSMC’s 16nmFF is actually just 20nm with FinFETs so 10nmFF should be on par with Intel’s 14nm node.......
the difference between Intel's 14nm FinFet and TSMC / Samsung 16/14nm FinFet.
AS ASML put it the foundries are progressing @ half node steps - too complicated for A.E.
Just look at the equipment stocks ....one of the reason they are doing well is that Intel actually pulled in 10nm
(as one key supplier stated)
he's becoming more and more an excellent contrarian
Smith is optimistic that the EUV tools will be ready earlier than expected so they can be implemented in the 10-nm process, but Intel isn’t betting on it.
Been saying this for quite some time - based on comments made by EUV supplier ASML but that's the first time mentioned by Intel.
My guess second "generation" of 10 nm - as ASML mentioned they are going to ship EUV steppers in 2017 that will go into production in 2018.
Me thinks 10 nm should be the "learning node" for 7 nm
quoting ASML "early adoption risky - late adoption expensive"
every major change like strained silicon , metal gate and FinFet was trailblazed by Intel and I don't see this changing in case of EUV
Intel would have used it starting @32nm but it wasn't ready.
Obviously there are work arounds but they are becoming more and more complex, increse cycletime and are more expensive -
remember several years Intel bought a stake of ASML - so did TSMC but they sold ....and there is the volume purchase agreement between ASML and Intel