Remember how many times you told us 20nm was here. It's still not here in volume production
Ignoring the 200 million odd SoC's from TSMC and Samsung. You are right.
Blah, blah, blah.
a lot better than that TSMC/Nenni blah, blah
how many billions did Intel spent on ASML ....litho will be super critical
(2 or 3 times more than Samsung and TSMC combined?)
The Blah, blah, blah was TSMC's quotes, not Intel's.
As for ASML, are you talking about the equity stake or on equipment?
This year, Intel is talking up its 14nm breakthroughs and highlighting its expectations for future sub-14nm scaling. The company’s path to a full 14nm ramp-up can be best characterized as “bumpy, but effective.” Intel’s 14nm shipments were delayed by 6-9 months depending on which product family you’re talking about, but the company did manage to hit superior process node characteristics compared to Samsung or TSMC. Gate lengths, pitches, and particularly SRAM scaling all offer more improvements and better characteristics.
[Monk, are you listening?]
Indeed. But on the other threads I was just pointing out that TSMC (and Samsung) have their own claims, such as:
“The performance of our 10nm, in terms of speed, power and density will be equal to what we believe Intel will define as its 10nm technology,” TSMC Director of Corporate Communications Elizabeth Sun told EE Times. “Technology-wise, we think we can close the gap at 10nm.”
Blah, blah, blah.
Siberia is a looong way from NE America.
Indeed it is...but it's also a fact.
Amazing things Air/Ocean currents.
p.s. meanwhile back on Planet Earth over 40m Americans are still suffering adverse winter conditions in late February.
Parts of the world will get colder as air/sea currents change with increases in temperature. This cold spell is caused by very cold air coming in from Siberia...
"Now that you and Ash have made up, can I ask when is the wedding? Do we all get an invite?"
[I hardly call Ash seeing the errors of his ways making up. And I thought you might have been above gay bashing stupidity. You sink to new lows.]
Bashing? No Wallis, I am happy for you.
"Perhaps you could tell us?"
[Your content-free churlishness, childishness is reaching getanid levels.]
No, not at all. It's been discussed on this board before, I'm just wondering if he has an alternative view?
according to Monk this will all change at 14/16nm - 20 nm was just a "bad" node nobody really liked in the first place - so why did they do it anyway
Perhaps you could tell us?
The IDM concept is not dead - quite the opposite
ARM designs "something" but has no clue how to put it into a productionworthy environment -
you need constant and fast feedback/interaction between design and manufacturing.
What I find funny is that you didn't know (until I explained about the PoPs) that there is a close relationship between the (hard) IP vendors, the foundries (and the tool chain vendors).
This isn't something new and has been increasing over the years. I don't doubt that Intel has an advantage with being an IDM especially when dealing with high performance, but the 'fabless' model still has it's advantages even with the new nodes coming on line. But you should know all this eh?
After all, as you are invested in the equipment guys, you would want all the tier 1 foundries to get to the next node...Or not, eh?
"No doubt we'll see TSMC soon announce that they'll be delivering Turbo MorphCore even though they don't know what it is yet."
[Monk will be first to post the announcement here. LOL]
Well, this is an architecture advance, so it would be the likes of ARMH not TSMC who would be doing the announcement:)
BTW, this is Intel's version of ARMH big little *wink*
It is nonsensical if it is not the same design. The G6430 in Moorefield/Merrifield clocks at 533 MHz vs 400-450 MHz in A7
We're talking about a generic way of comparing density. Every SoC is different, the design rules are different, etc, etc.
While I see what you are getting at with the G6430 comparison (like for like), we don't know how Apple and Intel Implement the design (optimizing for power or performance or size), or even if they are implementing the same revision of the same IP block.
I would be curious to see what you come up with.
you are completely out to lunch = actually that's what I like to hear from the ARM folks - you even mention 10nm....stick with your benchmarks
With respect, given your posting history over the last week or so, it's becoming clear that you don't understand as much as you claim. As examples, this thread you started - the content has little/nothing to do with the subject, while your Samsung 20nm claims are way, way off base.
Ah yes the infamous Apple to Core nonsensical comparison. Actually we have a real apples to apples comparison at Intel 22nm to Samsung 28nm (which was the densest foundry 28nm), the identical PowerVR6 block in Merrifield/Moorefield and A6 and Merrifield/Moorefields's gpu was denser and faster ... case closed.
yep, the A8 to Core M. It's not nonsensical, certainly from a high level point of view.
I'd like to see a link for the PowerVR6 comparison (and I assume you are talking about the A7, not the A6)?
[getanid61 continues to be an adolescent who thinks calling people names is an argument. It's not. It's what people without arguments, knowledge or brains resort to.]
Wallis, you do this all the time...
[Exactly why would what the marketing departments promise for three years from now be relevant?]
Indeed. But the marketing department isn't saying three years...
'Both TSMC and Samsung claim their density numbers will be around Intel's for 10nm...'
I was wrong, I found the datapoint I was thinking off, but it was a TSMC rebuttal of Intel's infamous density slide (was another chart). I found some real GP x M1P numbers for 10nm, and Intel is denser.
That said, I also came across some numbers comparing actual transistor density for TSMC 20nm V Intel 14nm, and while Intel has much better GP x M1P numbers (as you would expect given the node difference), TSMC still packs in more transistors per sq mm at 20nm than Intel does at 14nm. Different design rules, different design targets for the process, but just goes to show it's not all about transistor size.
Both TSMC and Samsung claim their density numbers will be around Intel's for 10nm...
they sell you a blue print ....that's all....how to put it into production.....POP...LOL
why spemd $ billions of capex on a off the shelf design - you tell me
Do you understand the difference between soft and hard IP?
For 20nm there was only one process and it wasn't really optimized for power or performance,
so what was it?
Both and neither. It's in the middle, no one was happy with it.
but for 14/16 at both Samsung and TSMC there are different flavors of process depending on requirements (ie, low power or performance).
so how many different flvavors do they offer?
At least two at TSMC, but I've only seen one reference for Samsung (14 LPE)
Intels 14nm Trigate is a "true" 14nm with 14nm backend - end of story - how does it compare to TSMC and Samsung
Er, you missed the point. Intel's 14nm from a transistor point of view is denser than either Samsung or TSMC.
AMAT says show me the money ....there are unceratinties about the timing of the ramp - got it?
I think none is willing to take the lead - why should they ? afterall they are competing with each other
I've got it, but do you? I'm really not sure you understand what is going on here, especially regarding my comments about the PoPs.
TSMC claim they have 60 odd designs on 16nm. Do you think they will all ramp at the same time?
hard to believe TSMC is at 12 months high while Samsung is producing FinFet
Why is that hard to believe?