SAN JOSE, Calif.--(BUSINESS WIRE)--
- Samsung and Cadence collaborate to enable an integrated flow for designing automotive, IoT and AI applications at 28nm FD-SOI node
- Samsung’s 28FD-SOI PDK techfile is Mixed-Signal OpenAccess ready, enabling customers to deploy OpenAccess-integrated, fully interoperable Virtuoso-Innovus implementation flows
Cadence Design Systems, Inc. (CDNS) today announced that its custom and analog/mixed-signal (AMS) IC design flow has achieved certification for Samsung Foundry’s 28nm FD-SOI (28FDS) process technology. This certification ensures that mutual customers of Cadence and Samsung Foundry will have access to a highly automated circuit design, layout, signoff and verification flow that enables efficient custom design at 28FDS.
For more information on the new Cadence custom and AMS flow that supports the Samsung 28FDS process technology, visit www.cadence.com/go/samsung28fdsoicams.
The Cadence custom and AMS flow is an ideal solution for customers developing automotive, internet of things (IoT) and artificial intelligence (AI) applications at 28FDS technology and features capabilities that are well suited for digitally assisted analog designs. The complete custom and AMS flow that is certified by Samsung Foundry includes the Virtuoso® Analog Design Environment (ADE), Virtuoso Schematic Editor, Virtuoso Layout Suite, Virtuoso Space-Based Router, Spectre® Accelerated Parallel Simulator (APS), Voltus™-Fi Custom Power Integrity Solution, Quantus™ Extraction Solution and Physical Verification System (PVS). The flow provides the following capabilities:
- Front-end design: Corner, statistical and reliability simulation; circuit and device checks; layout-dependent effect (LDE) analysis; and custom/mixed-signal simulation and verification management
- Custom layout design: Advanced, electro-migration and parasitic-aware environment that includes FD-SOI device and module generation, constraint-driven device placement and pin optimization, advanced automated routing, layout editing, and dynamic design rules checking (DRC) with Virtuoso Integrated PVS DRC
- Post-layout parasitic simulation and electromigration and IR drop (EMIR) analysis and integrated signoff: Includes parasitic extraction, DRC, layout versus schematic (LVS) checks, integrated and interactive design for manufacturing (DFM) and LDE analysis
- AMS design: Integrated digital standard cell placement capabilities, pin optimization, and automated custom routing
In addition to the custom and AMS flow certification, a process design kit (PDK) techfile is now Mixed-Signal OpenAccess ready, allowing customers to use the highly integrated Virtuoso-Innovus™ flow immediately. Mixed-Signal OpenAccess enables full interoperability between the Virtuoso and Innovus platforms operating on a single OpenAccess design database. This enables users to implement mixed-signal designs in a shorter time and to perform static timing analysis and signoff on a path across digital embedded in mixed-signal hierarchy of multiple blocks.
“Through our collaboration with Samsung, we’ve achieved certification for our integrated flow for custom and AMS design at 28FDS,” said Wilbur Luo, vice president, product management in the Custom IC and PCB Group at Cadence. “With our proven Virtuoso and Spectre platforms, mutual Samsung and Cadence customers can now utilize the most advanced features for circuit design, performance and reliability verification, automated layout, and block and chip integration to design emerging automotive, IoT and AI applications much more efficiently.”
“The Cadence custom and AMS tools offer customers advanced performance for their designs, and we’ve validated that the Cadence custom and AMS tools and the entire flow meets our requirements for designing at 28FDS,” said Hyungjong Ko, vice president of the Foundry IP Development Team at Samsung Electronics. “Our ongoing relationship with Cadence is contributing to the innovation of next-generation applications and improving overall designer productivity so customers can get to market faster.”
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at cadence.com.
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