SAN JOSE, CA--(Marketwire - Feb 5, 2013) - Cadence Design Systems, Inc. (
"As the leading innovators move to these smaller geometries, they are looking for tools that can keep up with their ever-changing needs," said Andy Brotman, vice president, Design Infrastructure at GLOBALFOUNDRIES. "By ensuring Cadence digital and analog tools support our 20-nanometer LPM production node, our customers can move forward with confidence that their complex designs can be successfully designed and manufactured at these ever-shrinking processes."
GLOBALFOUNDRIES said its qualification of the QRC techfiles, and certification of the PVS decks, meets the demand of customers who recognize the benefit of using signoff tools that are tightly integrated into Cadence custom/analog and digital flows.
"Through our close work with GLOBALFOUNDRIES and our customers, we are helping pave the way for development at today's most advanced geometries," said Dr. Chi-Ping Hsu, senior vice president, Silicon Realization Group at Cadence. "This certification of our Virtuoso and Encounter platforms, and the availability of our products, lets our customers know they now have the resources at their disposal to produce working silicon."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Cadence, Virtuoso, Encounter and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.