SAN JOSE, CA--(Marketwire - Jan 24, 2013) - Cadence Design Systems, Inc. (
In its paper, Cadence demonstrated advanced capabilities in the areas of 3D-IC, hybrid memory cube (HMC), wide I/O and other important DRAM developments. The company highlighted its early development of test chips with TSMC for advanced process nodes and its early IP releases for the newest industry standards.
"The Customers' Choice Award acknowledges the value of the contributions Cadence is making to bring new DRAM interface technology to market faster," said Martin Lund, senior vice president, research and development, SoC Realization Group at Cadence. "Working closely with TSMC and our customers, we have developed the IP and technology that serves as a major enabler for early customer adoption of advanced technology."
"Cadence is helping our customers bring their next-generation technology to market," said Suk Lee, TSMC senior director of Design Infrastructure Marketing. "Innovation in important areas like memory interface IP can have a significant impact on our customers' success, and this award is a reflection of that."
A year earlier, attendees at the TSMC ecosystem forum recognized Cadence for its paper on using clock concurrent optimization to improve power, performance and area on ARM A9 Cortex cores.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.