Cadence Design Systems, Inc. CDNS in collaboration with Xilinx XLNX, Arm and Taiwan Semiconductor Manufacturing Company Limited TSM recently introduced Arm Neoverse N1 System Development Platform (“SDP”).
Neoverse N1 SDP is touted to be the industry’s first infrastructure development platform based on TSMC’s 7 nanometer (nm) process which is verified by Cadence’s robust tool flow. The latest SDP utilizes Cadence IP for PCI Express (PCIe) Gen 4, DDR4 PHY IP and CCIX.
The SDP features Arm’s Neoverse N1-based system-on-chip (“SoC”) which runs on operating frequency of 2.6-3GHz. Moreover, the SDP based on Cadence’s latest 7 nm optimized system IP is loaded with high bandwidth memory and full-sized cache.
Notably, in September 2017, Cadence partnered with Xilinx and TSMC for the development of CCIX based on 7 nanometer (nm) FinFET (Fin Field Effect Transistor) technology scheduled for delivery in 2018.
Coming to price performance, shares of Cadence have returned 56.1% in the past year, substantially outperforming the industry’s rally of 19%.
Benefits & Availability
The Neoverse N1 SDP is primarily aimed at providing software and hardware developers a robust platform to customize the design of Arm’s Neoverse N1 SoCs on TSMC’s 7nm silicon technology.
By utilizing the platform which provides a sturdy cloud-to-edge architecture, developers can build advance edge computing applications.
Per the press release, “The robustness of the SDP is ideal for development, debug, performance optimization and workload analysis on a wide range of applications including those for machine learning (ML), artificial intelligence (AI) and data analytics.”
In a bid to further enhance data center performance and reduce total cost of ownership (“TCO”), developers can use Xilinx’s Alveo U280 Cache Coherent Interconnect for Accelerators (“CCIX”) accelerator card. Notably, the CCIX card connects the SDP with Xilinx’s Virtex UltraScale+ FPGAs, which aids developers in designing applications with improved efficiency.
Notably, Arm’s Neoverse N1 SoC offers around 30% greater compute efficiency gain compared with prior Neoverse infrastructure CPUs. Moreover, the N1 platform can be scaled from sub-35W systems to big hyperscale cloud data servers.
The efficiency and scalability features of the CPU are amplified when combined with Cadence’s robust workflow based on TSMC’s 7nm and Xilinx’s accelerator card.
Furthermore, the developers can access software stack of Neoverse N1 SDP via GitHub and Linaro open-source repositories.
The Neoverse N1 SDP is slated to be available in second quarter of 2019 in restricted quantities with availability ofhigher volumesscheduled in subsequent quarters. Notably, the Neoverse N1 Rapid Adoption Kit (RAK) is available.
What’s Favoring Adoption of Cadence IP Solutions?
Cadence is leaving no stone unturned to assist its customers in reducing time-to-market by accelerating their SoC design processes.
The company is benefiting from robust adoption of the company’s PCIe (peripheral component interconnect express) and DDR products in the IP segment.
Further, Cadence is focusing on providing end-to-end solutions, which rapidly reduces the time required to introduce a semiconductor product in the market. In this regard, the company's frequent product launches and enhancements bode well.
In fact, the company recently rolled out LPDDR5 IP solution utilizing TSMC’s 7 nm FinFET process technology. Notably, Cadence Denali Gen2 IP, the “industry’s first” silicon-based as well as LPDDR5 (Low-Power Double Data Rate) standard IP solution, is available.
Notably, Cadence’s buyout of nusemi inc, a company that develops high-speed Serializer/Deserializer (SerDes) communications IP, to complement its existing SerDes solutions, deserves a special mention.
With the integration of nusemi’s technologies, Cadence is well poised to deliver efficient, cost saving and high bandwidth functionality for telecom segments, edge computing and networking services.
Moreover, increasing investments on Internet-of-things (IoT), augmented and virtual reality (AR/VR) and autonomous vehicle sub-systems present significant growth opportunity.
Furthermore, growing clout of Cadence’s IP solutions particularly in the edge-computing and high performance computing (HPC) end-market holds promise. In fact, per Grand View Research estimates, HPC market is projected to witness a CAGR of 7.2% to reach $59.65 billion by 2025.
We believe that incremental adoption of the offerings will favor financial performance of IP segment going ahead.
Zacks Rank & Other Key Pick
Currently, Cadence sports a Zacks Rank #1 (Strong Buy).
Synopsys, Inc. SNPS is another top-ranked stock in the same industry flaunting a Zacks Rank #1. You can see the complete list of today’s Zacks #1 Rank stocks here.
Synopsys has a long-term earnings growth rate of 10%.
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