FELDKIRCHEN, GERMANY--(Marketwire - Feb 14, 2013) - Cadence Design Systems, Inc. (
Feb. 26-28, 2013
Hall 4 / 4-609
Partner technology demos:
- ARM booth, Hall 4 / 4-336: Visitors who are planning to develop Cortex-M-based processors will learn how the Cadence mixed-signal solutions work seamlessly with ARM-based processors.
- FlowCAD booth, Hall 4/4-321: Visitors can learn how power-aware memory interface and serial link design and analysis with Allegro Sigrity technology enables predictable product creation.
Cadence Papers on Feb. 27
- "Utilizing Mixed-Language Virtual Platforms for Programmable SoC FPGA Designs," by Jason Andrews, 10 a.m. to 10:30 a.m., Session 6: Embedded System Design Automation I
- "Hardware/Software Co-Debug and Co-Verification Environment for Embedded Systems Abstracts," by Markus Winterholer. 2:30 p.m. to 3 p.m.: Session 6: Embedded System Design Automation II
- "FPGA-based Rapid Prototyping - Help or Distraction for Embedded System Development?" by Juergen Jaeger. 4 p.m. to 4.30 pm, Session 8: FPGA and ASIC Design / SoC II
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, automotive electronics, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
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