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Rapid Silicon Chooses Verific’s Industry-Standard Parser Platform

·2 min read
Verific Design Automation
Verific Design Automation

Parser Platform to Serve as Front End to Rapid Silicon’s Integrated Design Environment

ALAMEDA, Calif. , Feb. 15, 2022 (GLOBE NEWSWIRE) -- Verific Design Automation, the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms, today announced Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology, is the newest licensee of its Parser Platform.

Rapid Silicon is quickly building a reputation as the leader of domain-specific, power-, performance- and area-optimized FPGAs for diverse target applications using an open-source methodology and proprietary AI technology to enable a fast and seamless design-to-silicon experience. It will use the Verific Parser Platform including SystemVerilog, VHDL and elaborators for both to serve as the front end to Rapid Silicon’s integrated design environment.

“Verific’s parser platform has the well-earned status of industry standard,” says Pierre-Emmanuel Gaillardon, CTO of Rapid Silicon. “All of the accolades about Verific are valid, a result of its robust, quality software through years of development and user experience and exceptional customer support. It’s a pleasure to work with Verific.”

“Rapid Silicon’s aims to set the standard for FPGAs and FPGA SoCs by building the largest independent AI-enabled FPGA company,” adds Michiel Ligthart, Verific’s president and COO. “We take pride in playing a role in helping to enable a fast and seamless design-to-silicon experience.”

Verific’s SystemVerilog, VHDL and universal power format (UPF) Parser Platforms are in production and development flows at semiconductor companies worldwide, from emerging companies to established Fortune 500 vendors. Applications range from analysis, simulation, formal verification and synthesis to hardware emulation and virtual prototyping, in-circuit debug and design for test. Verific distributes its Parser Platforms as C++ source code and compiles on all 32- and 64-bit Unix, Linux, Mac OS and Windows operating systems.

About Verific Design Automation
Verific Design Automation is the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms that enable project groups to develop advanced electronic design automation (EDA) products quickly and cost effective worldwide. With offices in Alameda, Calif., and Kolkata, India, Verific has shipped more than 60,000 copies of its software used worldwide by the EDA and semiconductor industry since it was founded in 1999.

Engage with Verific at:
Email: info@verific.com
Website: www.verific.com
LinkedIn: https://www.linkedin.com/company/verific-design-automation-inc/
Facebook: https://www.facebook.com/Verific-Design-Automation-100448363329771/

Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services. Approved for Public Release, Distribution Unlimited.

For more information, contact:
Nanette Collins
Public Relations for Verific
(617) 437-1822
nanette@nvc.com