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TSMC's 2nm chip production potentially delayed amid global semiconductor slowdown

Taiwan Semiconductor Manufacturing Company (TSMC), the world's leading semiconductor foundry, may experience a delay in its planned 2nm chip production. Originally slated for 2025, the production could be postponed to 2026 due to a slowdown in the construction of a new plant in Hsinchu Baosha, Taiwan. The delay appears to be linked to a broader global deceleration in semiconductor demand.

The transition to 2nm technology is a significant step for TSMC as it will introduce Gate-all-around (GAA) transistors. These transistors, which will replace the existing FinFET transistors, utilize vertically stacked nanosheets that allow the gate to interact with the channel from all sides. This design innovation is expected to reduce energy consumption and current leakage while enhancing drive current.

Samsung (KS:005930) Foundry has already integrated this GAA technology into its 3nm node, but TSMC intends to debut this technology with its 2nm chips. However, TSMC has disputed reports suggesting a delay in their 2nm chip production, possibly due to competitive pressures. Samsung Foundry remains on schedule to launch its 2nm chips in 2025 and has plans to start 1.4nm production by 2027.

In related developments, Intel (NASDAQ:INTC) is planning to implement a feature called Power Via into its chips next year. This innovative approach moves power supply lines from the traditional front-side placement to the back of a die, potentially improving power and performance. Following the completion of the first generation of 2nm production, TSMC also plans to integrate this feature into its 2nm chips.

TSMC's successful shift to the N3B 3nm process node was largely supported by allocating most of its 3nm capabilities for Apple (NASDAQ:AAPL)'s A17 Pro chip. These chips are expected to power the upcoming iPhone 15 Pro and iPhone 15 Pro Max. Despite a respectable yield of 70% in the first year of the new process node, TSMC offered Apple a deal that transferred all risks to the foundry.

This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.

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